In a semiconductor test process, a conductivity test is sometimes performed to detect a defective product by bringing probes having conductivity (conductive probes) into contact with a semiconductor wafer before dicing (WLT: Wafer Level Test). When this WLT is performed, to transfer a signal for a test generated and sent by a testing device (tester) to the semiconductor wafer, a probe card including a large number of probes is used. In the WLT, the probes are individually brought into contact with each of dies on the semiconductor wafer while the dies are scanned by the probe card. However, because several hundreds to several ten thousands dies are formed on the semiconductor wafer, it takes considerable time to test one semiconductor wafer. Thus, an increase in the number of dies causes higher cost.
To solve the problems of the WLT, recently, a method called FWLT (Full Waver Level Test) is also used in which several hundreds to several ten thousands probes are collectively brought into contact with all or at least a quarter to a half of dies on a semiconductor wafer. To accurately bring the probes into contact with the semiconductor wafer, this method requires technologies for maintaining positional accuracy of tips of probes by accurately keeping the parallelism or the flatness of a probe card with respect to a predetermined reference surface and for highly accurately aligning a semiconductor wafer.
FIG. 10 is a diagram of an example of the structure of a probe card applied in the FWLT. A probe card 71 shown in FIG. 10 includes a plurality of probes 72 provided according to an arrangement pattern of electrode pads on a semiconductor wafer, a probe head 73 that houses the probes 72, a space transformer 74 that transforms an interval of a fine wiring pattern in the probe head 73, an interposer 75 for connection of wires led out from the space transformer 74, a substrate 77 that connects wires 76 through the interposer 75 to a testing device, a male connector 78 provided on the substrate 77 and connected to a female connector provided on the testing device side, and a reinforcing member 79 for reinforcing the substrate 77.
Among these components, as the interposer 75, the one having a thin-film base material made of an insulative material such as ceramic and a plurality of leaf-spring connection terminals disposed in a predetermined pattern on both sides of the base material and formed in a cantilever shape is known. In the case of this interposer, connection terminals provided on one surface of the interposer 75 come into contact with electrode pads of the space transformer 74 and connection terminals provided on the other surface come into contact with electrode pads of the substrate 77, whereby electrical connection is established between the space transformer 74 and the substrate 77 (see, for example, Patent Document 1).
A technology is also known for forming the interposer 75 with pressure sensitive rubber (rubber connector), in which metal particles are arranged in a thickness direction in thin-walled silicone rubber. When a pressure is applied in the thickness direction, the metal particles adjacent to one another in the silicone rubber come into contact with one another, whereby the pressure sensitive rubber exhibits anisotropic conductivity. The space transformer 74 and the substrate 77 are electrically connected by applying the pressure sensitive rubber having such a characteristic as the interposer 75.
Patent Document 1: Japanese Patent No. 3386077